This invention relates generally to transceiver architecture in a wireless portable communication device. More particularly, the invention relates to systems and methods for performing a gain calibration in open loop and closed loop data paths in a multiple mode transceiver.
Radio frequency (RF) transmitters are found in many one-way and two-way communication devices, such as portable communication devices, (cellular telephones), personal digital assistants (PDAs) and other communication devices. An RF transmitter must transmit using whatever communication methodology is dictated by the particular communication system within which it is operating. For example, communication methodologies typically include amplitude modulation, frequency modulation, phase modulation, or a combination of these. In a typical global system for mobile communications (GSM) mobile communication system using narrowband time-division multiple access (TDMA), a Gaussian minimum shift keying (GMSK) modulation scheme is used to communicate data.
The deployment of new wireless systems presents unique challenges to mobile handset designers. In order to reap the full benefit of expanded capacity and increased data bandwidth, the new handsets must work on both the new systems as well as the old. One of these new systems has been named Enhanced Data Rates for GSM Evolution (EDGE). The EDGE standard is an extension of the Global System for Mobile Communications (GSM) standard.
The EDGE standard increases the data rate over that available with GSM by sending more bits per RF burst. More bits are sent in EDGE by using a modulation scheme based on 8-phase shift keying (8-PSK), which provides an increase over GSM's Gaussian minimum shift keying (GMSK) modulation format. In the EDGE modulation scheme, the 8-PSK constellation is rotated 3 radians every symbol period to avoid problems associated with zero crossings. In contrast to GMSK's constant amplitude envelope, the added rotation factor in the EDGE modulation scheme results in a non-constant amplitude envelope. This non-constant amplitude envelope presents some difficulties with regard to RF power control. These problems are exacerbated by the desire to have a single transmitter that can be used for both the GSM and EDGE standards.
The two point modulation scheme used to support both GMSK and EDGE sets stringent requirements on gain alignment (voltage-controlled oscillator (VCO) gain or KvCO) between open loop and closed loop data paths in the transmitter. Simulations indicate that in order to meet the spectral mask specifications for both standards, KVCO should be determined to an accuracy of less than 2%.
In order to account for the effects of channel frequency variation and temperature drift, KVCO must be measured or otherwise determined before the start of each transmit burst. In some transmitter embodiments, approximately 150 microseconds is available to measure and adjust KVCO, perform any required digital frequency centering, and to settle the phase-locked loop. Thus, approximately 50 to 100 microseconds is available before the start of each data burst to measure and adjust KVCO.
One approach to measure KVCO uses a first digital input signal which is converted by a digital-to-analog converter (DAC) to create an analog voltage signal. The analog voltage signal is applied to a VCO to generate a signal with a first frequency. A counter is used to estimate the output frequency of the VCO in response to the first digital input signal. Thereafter, a second digital input signal, different from the first digital input signal, is applied to the DAC and a second analog signal is applied to the VCO to generate a second frequency. The change in frequency is divided by the difference of the digital input signals to determine KVCO. Unfortunately, to achieve KVCO accuracy of less than 2%, a period of time in excess of 50 microseconds is required.
Another approach uses a digital input signal, which is applied to the feedback fractional divider input in the PLL. The VCO output frequency changes in response to the change in divide ratio. After allowing the PLL to settle, the change in VCO input voltage (or tune voltage) as determined by the ADC is used to estimate KVCO. To achieve KVCO accuracy of less than 2%, the ADC step should be known and reproducible to much better than 2% accuracy. Also, sufficient settling time should be allowed for the analog voltages to settle to better than 2% accuracy.
Therefore, it would be desirable to economically, efficiently and accurately measure KVCO to an accuracy of less than 2% in the limited time available before the start of a data burst.